Publications and Patents:
US11956978B2 | Techniques and device structure based upon directional seeding and selective deposition (April 2024) M. A. Zeeshan, K. Chan, S. Kallakuri, S. Varghese. This IP describes a process to selectively, angularly deposit metals & dielectrics on SiNx vs SiOx vs Si, the three most common substrates in semiconductor microchip fabrication.
US20240040808A1 | Techniques and device structure based upon directional seeding and selective deposition (February 2024) S. Varghese, M. A. Zeeshan, S. Kallakuri, K. Chan. Split patent encompassing parts of the above project idea.
US11749564B2 | Techniques for void-free material depositions (September 2023) M. A. Zeeshan, K. Chan, S. Kallakuri, S. Varghese, J. Hautala. This IP covers a foundational way to void-free deposit metal for Buried Wordline fill application (BWL) in leading-node transistors since voids raise chip operating resistance.
US11404314B2 | Metal line patterning (August 2022) S. Varghese, M. A. Zeeshan, S. Kallakuri, K. Chan. This method describes a process-flow for selective fin patterning through deposition/etch steps using Plasma-enhanced CVD and/or ALD for transistor Wordline and Bitline application.
US20220100078A1 | Devices and methods for variable etch depths (Pending) M. A. Zeeshan, R. Bandy, P. F. Kurunczi, S. Kallakuri, T. Soldi, J. C. Olson. This work covers a process-flow crucial to plasma etch processing of waveguides and gratings on optical glass (Various glass types) for Augmented Reality.
US20220119955A1 | Techniques for variable deposition profiles (Abandoned by us) M. A. Zeeshan, S. Kallakuri, J. C. Olson. This IP modulates refractive index for AR applications. Abandoned it and withdrew it midway during review (self) due to insufficient commercial value outlook.
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